CPC H04W 52/0232 (2013.01) [H04W 72/044 (2013.01); H04W 72/23 (2023.01); H04W 80/02 (2013.01)] | 20 Claims |
1. A first apparatus comprising:
a processor; and
a memory coupled with the processor, the memory storing executable instructions that when executed by the processor cause the processor to effectuate operations comprising:
receiving, from a second apparatus, a first discontinuous reception (DRX) configuration for a first serving cell of a cell group, and a second DRX configuration for a second serving cell of the cell group,
wherein the first DRX configuration for the first serving cell comprises a first drx-onDurationTimer and a first drx-InactivityTimer,
wherein the second DRX configuration for the second serving cell comprises a second drx-onDurationTimer and a second drx-InactivityTimer, and
wherein the first drx-onDurationTimer and the first drx-InactivityTimer of the first DRX configuration for the first serving cell are separately configured from the second drx-onDurationTimer and the second drx-InactivityTimer of the second DRX configuration for the second serving cell;
performing physical downlink control channel (PDCCH) monitoring in accordance with the first DRX configuration for the first serving cell and the second DRX configuration for the second serving cell; and
receiving a wake-up signal (WUS) that comprises a first indication for the first serving cell of the cell group that indicates whether an active time defined by the first DRX configuration should be skipped, and a second indication for the second serving cell of the cell group that indicates whether an active time defined by the second DRX configuration should be skipped.
|