| CPC H04N 19/44 (2014.11) [H04N 19/105 (2014.11); H04N 19/129 (2014.11); H04N 19/176 (2014.11); H04N 19/184 (2014.11); H04N 19/96 (2014.11)] | 9 Claims |

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1. A decoder, the decoder comprising circuitry configured to:
receive a bitstream including a coded picture, the coded picture including a first region having a first contiguous plurality of coding units and a second region having a second contiguous plurality of coding units;
construct for each coding unit in the first region a motion vector candidate list, each motion vector candidate list having a common motion vector, wherein the motion vector candidate lists are ordered such that the common motion vector is first;
decode the first plurality of coding units using the common motion vector from the motion vector candidate lists, whereby a picture region with common motion is reconstructed in the first region;
ascertain from the bitstream individually determined motion vectors for each coding unit of the second region, wherein adjacent coding units in the second region have different individually determined motion vectors, each individually determined motion vector being one of a translational motion vector for translational motion and a control point motion vector for affine motion; and
decode the second plurality of coding units using the individually determined motion vectors, whereby local motion in the second region is reconstructed.
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