| CPC H04B 1/40 (2013.01) | 20 Claims |
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1. A radio frequency (RF) frontend circuit, comprising:
a plurality of single-channel transceivers, each corresponding to one of a plurality of channels respectively, wherein each of the single-channel transceivers is configured to transmit and receive signals in a respective frequency band of a plurality of non-overlapping frequency bands, using a corresponding local oscillator (LO) signal generated based on the respective frequency band, with one of a plurality of directional antennas each corresponding to one of a plurality of radiation angles respectively, and wherein each of the single-channel transceivers comprises:
a local oscillator power divider to receive the corresponding LO signal generated for the respective frequency band and to generate a receive (RX) LO signal and a transmit (TX) LO signal based on the corresponding LO signal,
a receive chain coupled to the LO power divider, wherein the receive chain comprises:
an RX LO buffer to receive and to buffer the RX LO signal,
an RX LO in-phase/quadrature (I/Q) generation network coupled to the RX LO buffer to generate an in-phase component of the RX LO signal and a quadrature component of the RX LO signal,
a down-convert mixer to down convert an RF RX signal received from a respective directional antenna to generate an RX intermediate frequency (IF) in-phase component signal and an RX IF quadrature component signal based on the in-phase component of the RX LO signal and the quadrature component of the RX LO signal, wherein the respective directional antenna is configured to track a user movement within the corresponding radiation angle, and
an RX IF I/Q generation network coupled to the down-convert mixer to generate an RX IF output signal based on the RX IF in-phase component signal and the RX IF quadrature component signal,
a transmit chain coupled to the LO power divider, wherein the transmit chain comprises:
a TX LO buffer to receive and to buffer the TX LO signal,
a TX LO I/Q generation network coupled to the TX LO buffer to generate an in-phase component of the TX LO signal and a quadrature component of the TX LO signal,
a TX IF I/Q generation network to receive a TX IF signal and to generate a TX IF in-phase component signal and a TX IF quadrature component signal, and
an up-convert mixer to up convert the TX IF in-phase component signal and the TX IF quadrature component signal based on the in-phase component of the TX LO signal and the quadrature component of the TX LO signal, to generate an RF TX signal to be transmitted via the respective directional antenna;
a plurality of analog-to-digital converters (ADCs), each coupled to one of the plurality of single-channel transceivers;
a plurality of digital-to-analog converters (DACs), each coupled to the one of the plurality of single-channel transceivers; and
a digital signal processing (DSP) unit coupled to the plurality of ADCs and the plurality of DACs, wherein the DSP unit is configured to:
generate a first plurality of digital data streams and synchronize each of the first plurality of digital data streams in time, wherein each of the first plurality of digital data streams is converted by a respective one of the plurality of DACs into an analog data stream to be transmitted to a remote device by a respective one of the single-channel transceivers, and
process a second plurality of digital data streams received from the plurality of ADCs respectively, including synchronizing each of the second plurality of digital data streams in time, each of the second plurality of digital data streams being received via the corresponding radiation angle,
wherein each of the single-channel transceivers further comprises a switching device coupled to the respective directional antenna, the receive chain, and the transmit chain, wherein the switching device is configured to selectively couple the receive chain or the transmit chain to the respective directional antenna to receive or transmit RF signals via the respective directional antenna respectively, wherein the RF frontend circuit is integrated as a single IC chip.
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