US 12,250,009 B2
Interface device supporting test operation
Eun Ju Choe, Gyeonggi-do (KR); Ho Young Park, Gyeonggi-do (KR); and Jong Hwan Choi, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Mar. 15, 2023, as Appl. No. 18/183,952.
Claims priority of application No. 10-2022-0140121 (KR), filed on Oct. 27, 2022.
Prior Publication US 2024/0146329 A1, May 2, 2024
Int. Cl. H03M 9/00 (2006.01); H04L 27/26 (2006.01)
CPC H03M 9/00 (2013.01) [H04L 27/2647 (2013.01)] 13 Claims
OG exemplary drawing
 
1. An interface device comprising:
a first parallel-to-serial conversion circuit suitable for converting inverted parallel data in a parallel-to-serial manner to generate first output data in a test mode;
a second parallel-to-serial conversion circuit suitable for converting non-inverted parallel data in the parallel-to-serial manner to generate second output data in the test mode;
a third parallel-to-serial conversion circuit suitable for converting the non-inverted parallel data in the parallel-to-serial manner to generate third output data in the test mode;
a fourth parallel-to-serial conversion circuit suitable for converting the inverted parallel data in the parallel-to-serial manner to generate fourth output data in the test mode;
a first driver circuit suitable for receiving the first and second output data in the test mode; and
a second driver circuit suitable for receiving the third and fourth output data in the test mode.