US 12,250,004 B2
Storage device performing error correction and operating method of storage device
YongSung Kil, Suwon-si (KR); Soonyoung Kang, Suwon-si (KR); Hong Rak Son, Suwon-si (KR); and Kangseok Lee, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on May 17, 2023, as Appl. No. 18/318,874.
Claims priority of application No. 10-2022-0134370 (KR), filed on Oct. 18, 2022.
Prior Publication US 2024/0128986 A1, Apr. 18, 2024
Int. Cl. H03M 13/11 (2006.01); G06F 11/10 (2006.01)
CPC H03M 13/1177 (2013.01) [G06F 11/1004 (2013.01)] 19 Claims
OG exemplary drawing
 
18. An operating method of operating a storage device including a nonvolatile memory device and a memory controller, the method comprising:
sending, at the memory controller, a first read command to the nonvolatile memory device;
performing, at the nonvolatile memory device, a first read operation in response to the first read command and sending first data as a result of the first read operation to the memory controller;
estimating, at the memory controller, an error rate of the first data;
in response to the estimated error rate being equal to or smaller than a threshold value, performing, at the memory controller, a hard decision decoding operation on the first data; and
in response to the estimated error rate being greater than the threshold value, sending, at the memory controller, a second read command to the nonvolatile memory device.