US 12,250,000 B2
Delay element circuit for ring oscillator and stall detection utilized in self-clocked SAR ADC
Bjornar Hernes, Trondheim (NO)
Assigned to Disruptive Technologies Research AS, Lysaker (NO)
Filed by Disruptive Technologies Research AS, Rådal (NO)
Filed on Jan. 6, 2017, as Appl. No. 15/400,534.
Claims priority of provisional application 62/275,365, filed on Jan. 6, 2016.
Prior Publication US 2017/0194980 A1, Jul. 6, 2017
Int. Cl. H03M 1/12 (2006.01); H03K 3/03 (2006.01); H03M 1/00 (2006.01); H03M 1/46 (2006.01)
CPC H03M 1/125 (2013.01) [H03K 3/0315 (2013.01); H03M 1/002 (2013.01); H03M 1/468 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A self-clocked SAR ADC sensor circuit for executing analog-to-digital conversion of a sensed value VIN, the self-clocked SAR ADC sensor circuit comprising:
an ADC having a capacitor array comprising a plurality of capacitors connected through a respective plurality of switches;
a comparator;
an SAR module;
a delay element circuit for ring oscillator and stall detection; and
a controller configured to execute a track phase when a sample clock signal CK_SMP is low by applying an input voltage VIN over all capacitors in the capacitor array of the ADC, execute a sampling phase on a subsequent rising edge of CK_SMP by opening a respective plurality of switches such that a sample of VIN is stored over the capacitor array of the ADC, and execute a comparison phase via the comparator, wherein the delay element circuit allows completion of each conversion prior to a new conversion being attempted and, when the completion is not possible, provides a notification that a stall has occurred.