US 12,249,987 B2
Programmable look-up table systems and methods
Satwant Singh, Fremont, CA (US); and Patrick Crotty, San Jose, CA (US)
Assigned to Lattice Semiconductor Corporation, Hillsboro, OR (US)
Filed by Lattice Semiconductor Corporation, Hillsboro, OR (US)
Filed on Dec. 27, 2022, as Appl. No. 18/146,925.
Claims priority of provisional application 63/295,747, filed on Dec. 31, 2021.
Prior Publication US 2023/0216503 A1, Jul. 6, 2023
Int. Cl. H03K 19/17728 (2020.01); H03K 19/17736 (2020.01)
CPC H03K 19/17728 (2013.01) [H03K 19/17744 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A look-up table (LUT) circuit comprising:
a first LUT configured to:
selectively receive a first input signal and each input signal of a set of input signals; and
determine a first output signal based on the first input signal and/or one or more input signals of the set of input signals; and
a second LUT configured to:
selectively receive a second input signal and each input signal of the set of input signals; and
determine a second output signal based on the second input signal and/or one or more input signals of the set of input signals;
a first multiplexer configured to:
selectively receive the first output signal, the second output signal, and a third input signal; and
selectively provide, based on the third input signal, the first output signal or the second output signal as a first LUT output signal of the LUT circuit; and
a plurality of programmable routing lines, wherein:
the first LUT comprises a first plurality of input ports each configured to selectively connect to a respective one of the plurality of programmable routing lines;
each input port of the first plurality of input ports is configured to selectively receive, via the programmable routing line selectively connected to the input port, the first input signal or a respective input signal of the set of input signals;
the second LUT comprises a second plurality of input ports each configured to selectively connect to a respective one of the plurality of programmable routing lines; and
each input port of the second plurality of input ports is configured to selectively receive, via the programmable routing line selectively connected to the input port, the second input signal or a respective input signal of the set of input signals.