US 12,249,984 B2
Integrated circuit including power gating circuit
Changyeon Yu, Hwaseong-si (KR); Pansuk Kwak, Goyang-si (KR); and Daeseok Byeon, Seongnam-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Aug. 11, 2022, as Appl. No. 17/886,194.
Claims priority of application No. 10-2021-0117938 (KR), filed on Sep. 3, 2021.
Prior Publication US 2023/0073878 A1, Mar. 9, 2023
Int. Cl. H01L 27/02 (2006.01); G06F 1/26 (2006.01); H03K 17/687 (2006.01); H03K 19/00 (2006.01); H03K 19/003 (2006.01)
CPC H03K 19/0016 (2013.01) [G06F 1/26 (2013.01); H03K 17/687 (2013.01); H03K 19/0013 (2013.01); H03K 19/00384 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A fabricated integrated circuit comprising:
a logic circuit comprising a plurality of logic transistors, the logic circuit comprising a plurality of logic gate lines extending in a first direction; and
a power gating circuit comprising a plurality of power gating transistors, the power gating circuit comprising a first power gate line extending in a second direction that is perpendicular to the first direction, and the power gating circuit being connected to the logic circuit,
wherein a plurality of source regions respectively included in the plurality of power gating transistors are connected to each other to a power supply, the plurality of power gating transistors being connected to each other via the first power gate line extending in the second direction, or a plurality of drain regions respectively included in the plurality of power gating transistors are connected to each other to a ground, the plurality of power gating transistors being connected to each other via the first power gate line extending in the second direction,
wherein the power gating circuit further comprises:
a first power gating transistor of the plurality of power gating transistors, wherein a first conductor of a first gate of the first power gating transistor is the first power gate line;
a second power gating transistor of the plurality of power gating transistors, wherein a second conductor of a second gate of the second power gating transistor is the first power gate line; and
an isolation transistor connected to the first power gate line and connected between the first power gating transistor and the second power gating transistor,
wherein a third conductor of a third gate of the isolation transistor is a first metal portion extending in the first direction from the first power gate line over a first active region, and
the first active region provides a field effect channel for each of the first power gating transistor, the second power gating transistor, and the isolation transistor.