| CPC H03K 17/785 (2013.01) | 19 Claims |
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1. A semiconductor device, comprising:
a first switch element including a first MOS transistor and a second MOS transistor each having one end connected to a first node and a gate end connected to a second node, and
a second switch element including a third MOS transistor and a fourth MOS transistor each having one end connected to a third node and a gate end connected to a fourth node;
a first light emitting element and a second light emitting element,
a first light receiving element configured to generate a current based on light generated by the first light emitting element;
a second light receiving element configured to generate a current based on light generated by the second light emitting element;
a first voltage control circuit configured to apply a voltage to the second node based on the current generated by the first light receiving element;
a second voltage control circuit configured to apply a voltage to the third node based on the current generated by the second light receiving element;
a first switch control circuit configured to cause the first light emitting element to emit light after a first time elapses after an input signal has transitioned from a first logic level to a second logic level; and
a second switch control circuit configured to suspend light emission of the second light emitting element after a second time elapses after the input signal has transitioned from the second logic level to the first logic level, wherein
each of the first MOS transistor and the second MOS transistor is an enhancement type N-channel MOSFET, and
each of the third MOS transistor and the fourth MOS transistor is a depletion type N-channel MOSFET.
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