CPC H01L 33/0041 (2013.01) [H01L 25/167 (2013.01); H01L 29/401 (2013.01); H01L 29/42312 (2013.01); H01L 33/0037 (2013.01); H01L 27/156 (2013.01); H01L 33/007 (2013.01); H01L 33/0093 (2020.05); H01L 33/20 (2013.01); H01L 33/44 (2013.01); H01L 2933/0066 (2013.01)] | 24 Claims |
1. A method of manipulating electric field in a micro device for manipulating vertical current flow, the method comprising:
providing a structure having a floating gate that is charged with different methods to bias a metal-insulator-semiconductor (MIS) structure;
providing a biasing control gate that is isolated with a dielectric layer from the floating gate;
storing charges in the floating gate using the biasing control gate; and
biasing the micro device through functional electrodes to have current flow vertically limiting lateral current.
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