US 12,249,619 B2
Integrated circuit with coil below and overlapping a pad
Jedrzej Wyczynski, Santa Clara, CA (US)
Assigned to NVIDIA Corporation, Santa Clara, CA (US)
Filed by Nvidia Corporation, Santa Clara, CA (US)
Filed on Apr. 25, 2022, as Appl. No. 17/728,542.
Prior Publication US 2023/0343814 A1, Oct. 26, 2023
Int. Cl. H01F 27/28 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 27/02 (2006.01); H01L 49/02 (2006.01)
CPC H01L 28/10 (2013.01) [H01F 27/2804 (2013.01); H01L 23/5227 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 27/0255 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05025 (2013.01); H01L 2224/13026 (2013.01); H01L 2924/1206 (2013.01)] 11 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
a chip substrate having a upper isolation layer with a pad thereon; and
a coil located below the metal pad, wherein, in a dimension perpendicular to a surface of the chip substrate, a perimeter of the coil overlaps with a perimeter of the pad, wherein the coil is electrically connected to the pad by one or more conductive interconnects.