US 12,249,612 B2
Fingerprint recognition module and driving method thereof, and display apparatus
Kuiyuan Wang, Beijing (CN); Cheng Li, Beijing (CN); Yue Geng, Beijing (CN); Yi Dai, Beijing (CN); Zefei Li, Beijing (CN); Chaoyang Qi, Beijing (CN); Zhonghuan Li, Beijing (CN); Xiaoguan Li, Beijing (CN); Congcong Xi, Beijing (CN); Yajie Feng, Beijing (CN); and Yingzi Wang, Beijing (CN)
Assigned to Beijing BOE Sensor Technology Co., Ltd., Beijing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/756,688
Filed by Beijing BOE Sensor Technology Co., Ltd., Beijing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed May 31, 2021, PCT No. PCT/CN2021/097456
§ 371(c)(1), (2) Date May 31, 2022,
PCT Pub. No. WO2022/252067, PCT Pub. Date Dec. 8, 2022.
Prior Publication US 2024/0304636 A1, Sep. 12, 2024
Int. Cl. G06V 40/13 (2022.01); H01L 27/146 (2006.01)
CPC H01L 27/14607 (2013.01) [G06V 40/1318 (2022.01); H01L 27/1462 (2013.01); H01L 27/14612 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A fingerprint recognition device, comprising:
a base substrate;
a driving circuit layer on a side of the base substrate, wherein the driving circuit layer comprises a plurality of driving transistors arranged in an array;
a first insulating layer on a side of the driving circuit layer facing away from the base substrate, wherein the first insulating layer comprises a plurality of first via holes running through the first insulating layer in a thickness direction of the first insulating layer;
a plurality of photoelectric converters on a side of the first insulating layer facing away from the driving circuit layer, and in contact with first electrodes of the plurality of driving transistors through the plurality of first via holes in one-to-one correspondence;
a second insulating layer on a side of the first insulating layer facing away from the base substrate, wherein the second insulating layer comprises a plurality of second via holes in one-to-one correspondence with the plurality of photoelectric converters, wherein a distance between an edge of an orthographic projection, on the base substrate, of a region of a second via hole exposing a corresponding photoelectric converter and an edge of an orthographic projection, on the base substrate, of a surface of the corresponding photoelectric converter facing away from the base substrate is smaller than or equal to a first preset value;
a plurality of first electrodes on sides of the plurality of photoelectric converters facing away from the driving circuit layer, wherein each of the plurality of first electrodes covers, at the second via hole, the corresponding photoelectric converter;
a third insulating layer, disposed on a side of the second insulating layer facing away from the first insulating layer, and comprising a plurality of third via holes;
a third conducting layer, disposed on a side of the third insulating layer facing away from the second insulating layer, and being in contact with the plurality of first electrodes through the plurality of third via holes;
a fourth insulating layer, disposed on a side of the third conducting layer facing away from the third insulating layer;
a shading metal layer, disposed on a side of the fourth insulating layer facing away from the third conducting layer, wherein an orthographic projection of the shading metal layer on the base substrate covers an orthographic projection of the active layer of the driving transistors on the base substrate;
a fifth insulating layer, disposed on a side of the shading metal layer facing away from the fourth insulating layer, wherein the fifth insulating layer comprises a plurality of fourth via holes running through the fifth insulating layer in a thickness direction of the fifth insulating layer; and
a shielding layer, disposed on a side of the fifth insulating layer facing away from the shading metal layer, and being in contact with the shading metal layer through the fourth via holes.