US 12,249,607 B2
Semiconductor structure
Sheng Zhang, Singapore (SG); Chunyuan Qi, Singapore (SG); Xingxing Chen, Singapore (SG); and Chien-Kee Pang, Singapore (SG)
Assigned to United Microelectronics Corp., Hsinchu (TW)
Filed by United Microelectronics Corp., Hsinchu (TW)
Filed on Jan. 11, 2023, as Appl. No. 18/152,781.
Application 18/152,781 is a division of application No. 17/383,283, filed on Jul. 22, 2021, granted, now 11,605,648.
Claims priority of application No. 202110725291.0 (CN), filed on Jun. 29, 2021.
Prior Publication US 2023/0154926 A1, May 18, 2023
Int. Cl. H01L 27/12 (2006.01); H01L 21/762 (2006.01); H01L 21/84 (2006.01); H01L 21/02 (2006.01)
CPC H01L 27/1203 (2013.01) [H01L 21/76256 (2013.01); H01L 21/84 (2013.01); H01L 21/02274 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a carrier substrate;
a trap-rich layer, disposed on the carrier substrate;
a dielectric layer, disposed on the trap-rich layer;
an interconnect structure, disposed on the dielectric layer;
a device structure layer, disposed on the interconnect structure and electrically connected to the interconnect structure; and
a circuit structure, disposed on the device structure layer and electrically connected to the device structure layer,
wherein the interconnect structure is not in contact with the trap-rich layer, and the interconnect structure is located between the dielectric layer and the device structure layer.