US 12,249,603 B2
Resistor structures of integrated circuit devices including stacked transistors and methods of forming the same
Byounghak Hong, Albany, NY (US); Seungchan Yun, Waterford, NY (US); Inchan Hwang, Schenectady, NY (US); Hyoeun Park, Cohoes, NY (US); and Kang-ill Seo, Albany, NY (US)
Assigned to SAMSUNG ELECTRONICS CO., LTD., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jan. 7, 2022, as Appl. No. 17/570,920.
Claims priority of provisional application 63/273,246, filed on Oct. 29, 2021.
Prior Publication US 2023/0135219 A1, May 4, 2023
Int. Cl. H01L 27/06 (2006.01); H01L 25/07 (2006.01); H01L 27/07 (2006.01); H01L 27/08 (2006.01); H01L 49/02 (2006.01)
CPC H01L 27/0738 (2013.01) [H01L 25/074 (2013.01); H01L 27/0688 (2013.01); H01L 27/0802 (2013.01); H01L 28/20 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A resistor structure comprising:
a substrate;
an upper semiconductor layer that is spaced apart from the substrate in a vertical direction;
a lower semiconductor layer that is between the substrate and the upper semiconductor layer and spaced apart in the vertical direction from the substrate and from the upper semiconductor layer;
an insulating layer that is between the upper semiconductor layer and the lower semiconductor layer; and
first and second resistor contacts that are spaced apart from each other in a horizontal direction,
wherein at least one of the upper semiconductor layer, the lower semiconductor layer, and a portion of the substrate contacts the first and second resistor contacts.