US 12,249,576 B2
Semiconductor device structure with stacked conductive plugs and method for preparing the same
Yi-Hsien Chou, Taoyuan (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Apr. 15, 2024, as Appl. No. 18/635,378.
Application 18/635,378 is a division of application No. 17/541,587, filed on Dec. 3, 2021.
Prior Publication US 2024/0258231 A1, Aug. 1, 2024
Int. Cl. H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/31144 (2013.01); H01L 21/76807 (2013.01); H01L 21/76843 (2013.01); H01L 21/76877 (2013.01); H01L 23/5283 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A method for preparing a semiconductor device structure, comprising:
forming a first dielectric layer over and in contact with a top surface of a semiconductor substrate;
etching the first dielectric layer to form a first opening exposing the top surface of the semiconductor substrate, wherein the first opening is formed through the first dielectric layer from a top surface thereof to the top surface of the semiconductor substrate, such that a depth of the first opening is equal to a thickness of the first dielectric layer;
forming recesses by removing portions of the first dielectric layer at top corners of the first opening;
forming a first conductive plug in the first opening and the recesses, wherein a top surface of the first conductive plug is coplanar with a top surface of the first dielectric layer;
forming a second dielectric layer over the first dielectric layer to cover the top surface of the first conductive plug;
etching the second dielectric layer to form a second opening exposing the top surface of the first conductive plug; and
forming a second conductive plug in the second opening.