US 12,249,575 B2
Integrated circuit structure with backside via
Pei-Yu Wang, Hsinchu (TW); and Yu-Xuan Huang, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Apr. 18, 2023, as Appl. No. 18/302,147.
Application 18/302,147 is a division of application No. 17/158,409, filed on Jan. 26, 2021, granted, now 11,652,043.
Claims priority of provisional application 63/017,147, filed on Apr. 29, 2020.
Prior Publication US 2023/0253313 A1, Aug. 10, 2023
Int. Cl. H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 27/088 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/76802 (2013.01); H01L 27/088 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit (IC) structure comprising:
a gate structure;
a source epitaxial structure and a drain epitaxial structure respectively on opposite sides of the gate structure;
a front-side interconnection structure over a front-side of the source epitaxial structure and a front-side of the drain epitaxial structure;
a backside dielectric layer over a backside of the source epitaxial structure and a backside of the drain epitaxial structure;
an epitaxial regrowth layer on the backside of a first one of the source epitaxial structure and the drain epitaxial structure, wherein the backside of a second one of the source epitaxial structure and the drain epitaxial structure is free of an epitaxial regrowth; and
a backside via extending through the backside dielectric layer to the epitaxial regrowth layer.