US 12,249,566 B1
3DIC with gap-fill structures and the method of manufacturing the same
Ping-Jung Wu, Hsinchu (TW); Ken-Yu Chang, Hsinchu (TW); Hao-Wen Ko, Hsinchu (TW); and Tsang-Jiuh Wu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Nov. 21, 2023, as Appl. No. 18/516,039.
Claims priority of provisional application 63/520,705, filed on Aug. 21, 2023.
Int. Cl. H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 27/06 (2006.01)
CPC H01L 23/49827 (2013.01) [H01L 21/76837 (2013.01); H01L 21/76843 (2013.01); H01L 23/5384 (2013.01); H01L 27/0688 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
bonding a top die to a bottom die;
depositing a first dielectric liner on the top die;
depositing a gap-fill layer on the first dielectric liner, wherein the gap-fill layer has a first thermal conductivity value higher than a second thermal conductivity value of silicon oxide, wherein the depositing the gap-fill layer comprises:
depositing a first sub layer comprising a first material; and
depositing a second sub layer over the first sub layer, wherein the second sub layer comprises a second material different from the first material;
etching the gap-fill layer and the first dielectric liner to form a through-opening, wherein a metal pad in the bottom die is exposed to the through-opening, wherein the etching the gap-fill layer comprises etching the second sub layer, with the first sub layer being used as an etch stop layer;
depositing a second dielectric liner lining the through-opening;
filling the through-opening with a conductive material to form a through-via connecting to the metal pad; and
forming a redistribution structure over and electrically connecting to the top die and the through-via.