US 12,249,557 B2
Semiconductor device including backside wiring structure with super via
Seung Ha Oh, Seoul (KR); Kwang Jin Moon, Hwaseong-si (KR); and Ho-Jin Lee, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jan. 21, 2022, as Appl. No. 17/581,084.
Claims priority of application No. 10-2021-0070672 (KR), filed on Jun. 1, 2021.
Prior Publication US 2022/0384311 A1, Dec. 1, 2022
Int. Cl. H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 23/50 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/535 (2006.01); H01L 23/538 (2006.01); H01L 27/088 (2006.01)
CPC H01L 23/481 (2013.01) [H01L 21/76898 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate comprising a frontside including an active region, and a backside opposite to the frontside;
an electronic element on the active region;
a frontside wiring structure electrically connected to the electronic element, on the frontside of the substrate; and
a backside wiring structure electrically connected to the electronic element, on the backside of the substrate,
wherein the backside wiring structure comprises a plurality of backside wiring patterns sequentially stacked on the backside of the substrate, and a super via pattern that intersects and extends through at least one layer of the plurality of backside wiring patterns,
wherein the super via pattern does not penetrate the substrate.