| CPC H01L 23/373 (2013.01) [H01L 21/76802 (2013.01); H01L 23/49811 (2013.01); H01L 23/49838 (2013.01); H01L 24/14 (2013.01)] | 20 Claims |

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1. A method, comprising:
forming a first semiconductor device structure, comprising:
forming two or more first devices on a first substrate;
forming a first interconnection structure over the first substrate and the two or more devices;
forming first openings in the first substrate and the first interconnection structure between adjacent devices of the two or more first devices; and
forming a thermal conductive layer in the first openings and on the first substrate, wherein the thermal conductive layer is formed by a single deposition process and is electrically isolated from the two or more first devices, and the thermal conductive layer covers an entire back side of the first substrate;
forming a second semiconductor device structure, comprising:
forming two or more second devices on a second substrate;
forming a second interconnection structure over the second substrate and the two or more second devices;
forming second openings in the second substrate and the second interconnection structure between adjacent devices of the two or more second devices; and
forming thermal conductive features in the second openings, wherein the thermal conductive features are electrically isolated from the two or more second devices; and
bonding the first semiconductor device structure to the second semiconductor device structure.
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