US 12,249,543 B2
Semiconductor device including plurality of gate fingers with various levels
Kenya Nishiguchi, Osaka (JP); and Akihiro Hayasaka, Osaka (JP)
Assigned to Sumitomo Electric Industries, Ltd., Osaka (JP)
Filed by Sumitomo Electric Industries, Ltd., Osaka (JP)
Filed on Jun. 17, 2022, as Appl. No. 17/842,890.
Claims priority of application No. 2021-138911 (JP), filed on Aug. 27, 2021.
Prior Publication US 2023/0068932 A1, Mar. 2, 2023
Int. Cl. H01L 21/8234 (2006.01); H01L 23/367 (2006.01); H01L 23/66 (2006.01); H01L 27/088 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/20 (2006.01); H01L 29/778 (2006.01)
CPC H01L 21/823456 (2013.01) [H01L 21/823437 (2013.01); H01L 21/823462 (2013.01); H01L 23/367 (2013.01); H01L 23/66 (2013.01); H01L 27/088 (2013.01); H01L 29/41775 (2013.01); H01L 29/42356 (2013.01); H01L 29/42368 (2013.01); H01L 29/2003 (2013.01); H01L 29/7786 (2013.01); H01L 2223/665 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate;
a channel layer provided on the substrate;
a semiconductor layer provided on the channel layer;
a plurality of gate fingers provided on the semiconductor layer and arranged in an arrangement direction in a plan view from a vertical direction perpendicular to an upper surface of the substrate;
a gate connection wiring provided on the semiconductor layer and to which the plurality of gate fingers are commonly connected; and
an insulating film provided between the semiconductor layer and the plurality of gate fingers;
wherein the plurality of gate fingers includes:
a first gate finger; and
a second gate finger closer to the center of the plurality of gate fingers in the arrangement direction than the first gate finger;
wherein a first distance in the vertical direction between a lower surface of the first gate finger in contact with the insulating film and an upper surface of the channel layer in contact with the semiconductor layer is greater than a second distance in the vertical direction between a lower surface of the second gate finger in contact with the insulating film and the upper surface of the channel layer in contact with the semiconductor layer.