CPC H01L 21/76224 (2013.01) [H01L 21/02164 (2013.01); H01L 21/0217 (2013.01); H01L 21/02247 (2013.01); H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/66439 (2013.01); H01L 29/66545 (2013.01); H01L 29/66742 (2013.01); H01L 29/775 (2013.01); H01L 29/78696 (2013.01)] | 20 Claims |
1. A method, comprising:
forming a semiconductor stack on a substrate, wherein the semiconductor stack includes first semiconductor layers of a first semiconductor material and second semiconductor layers of a second semiconductor material alternatively stacked on the substrate;
patterning the semiconductor stack and the substrate to form a trench and an active region being adjacent the trench;
epitaxially growing a liner of the first semiconductor material on sidewalls of the trench and sidewalls of the active region;
forming an isolation feature in the trench;
performing a rapid thermal nitridation process, thereby converting the liner into a silicon nitride layer; and
forming a cladding layer of the second semiconductor material over the silicon nitride layer.
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