US 12,249,530 B2
Wafer for electronic components
Kenichi Takemasa, Tokyo (JP); Kazuyuki Yamada, Tokyo (JP); Keisuke Asada, Tokyo (JP); and Daiki Isono, Tokyo (JP)
Assigned to JAPAN DISPLAY INC., Tokyo (JP)
Filed by Japan Display Inc., Tokyo (JP)
Filed on Apr. 13, 2022, as Appl. No. 17/719,388.
Claims priority of application No. 2021-069105 (JP), filed on Apr. 15, 2021.
Prior Publication US 2022/0336250 A1, Oct. 20, 2022
Int. Cl. H01L 25/075 (2006.01); H01L 21/683 (2006.01); H01L 33/62 (2010.01)
CPC H01L 21/6835 (2013.01) [H01L 25/0753 (2013.01); H01L 33/62 (2013.01); H01L 2221/68354 (2013.01); H01L 2221/68363 (2013.01); H01L 2933/0066 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A wafer for electronic components for transferring without dividing, comprising:
a sapphire substrate including a first surface and a second surface on an opposite side to the first surface; and
a plurality of electronic components located on a side of the first surface, wherein
the plurality of electronic components are fixedly attached to the first surface of the sapphire substrate via a release layer for releasing the electronic components from the sapphire substrate,
the sapphire substrate includes trench portions located between respective adjacent electronic components,
the trench portions extend linearly in plan view with respect to the first surface,
the sapphire substrate includes a plurality of protruding portions formed on the first surface, and
a depth of the trench portions is greater than a height of the protruding portions.