US 12,249,518 B2
Semiconductor device comprising interconnect structures
Jiun Yi Wu, Zhongli (TW); and Chen-Hua Yu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 21, 2022, as Appl. No. 17/870,321.
Application 17/870,321 is a division of application No. 16/746,192, filed on Jan. 17, 2020, granted, now 11,817,325.
Prior Publication US 2022/0367211 A1, Nov. 17, 2022
Int. Cl. H01L 21/56 (2006.01); H01L 21/52 (2006.01); H01L 21/768 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/522 (2006.01)
CPC H01L 21/52 (2013.01) [H01L 21/563 (2013.01); H01L 21/76879 (2013.01); H01L 23/3121 (2013.01); H01L 23/49833 (2013.01); H01L 23/5226 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a redistribution structure;
a first interconnect structure electrically connected to a first side of the redistribution structure;
a second interconnect structure electrically connected to the first side of the redistribution structure, wherein the second interconnect structure is spaced apart from the first interconnect structure by a first region, wherein the second interconnect structure comprises a first sidewall facing the first interconnect structure;
a molded underfill material located within the first region and a second region outside the first region, wherein the molded underfill material has a first height within the first region and a second height within the second region, wherein the first height is smaller than the second height, wherein the first sidewall of the second interconnect structure is only partially covered by the molded underfill material, wherein the molded underfill material within the first region is in physical contact with the first side of the redistribution structure, wherein the molded underfill material has a vertical sidewall within the second region, wherein the vertical sidewall has an interface with a protection layer of the first interconnect structure;
a semiconductor device electrically connected to a second side of the redistribution structure opposite the first interconnect structure; and
an external electrical connector disposed on a surface of the first interconnect structure facing away from the redistribution structure, wherein a first distance between a first end of the external electrical connector and the first side of the redistribution structure is smaller than the second height, and a second distance between a second end of the external electrical connector and the first side of the redistribution structure is greater than the second height, wherein the external electrical connector comprises contact bumps or solder balls.