| CPC H01L 21/465 (2013.01) [H01L 21/32134 (2013.01); H01L 25/0657 (2013.01)] | 19 Claims |
|
1. A manufacturing method of a semiconductor structure, comprising:
forming a stacked structure on a substrate, the stacked structure comprising a plurality of semiconductor layers and a plurality of sacrificial layers that are alternately stacked, wherein thicknesses of the semiconductor layers gradually increase by a constant amount from bottom to top, and the forming the stacked structure on the substrate comprises:
sequentially forming a first sacrificial layer, a first semiconductor layer, a second sacrificial layer, and a second semiconductor layer on the substrate; and
repeating the sequentially forming the first sacrificial layer, the first semiconductor layer, the second sacrificial layer, and the second semiconductor layer on the substrate;
forming a dummy gate structure on the stacked structure;
forming a spacer on both sides of the dummy gate structure;
removing the dummy gate structure, thereby forming an opening;
removing the sacrificial layers from the opening; and
forming a gate structure to cover the semiconductor layers.
|