US 12,249,504 B2
Manufacturing and reuse of semiconductor substrates
Bernhard Goller, Villach (AT); Alexander Christian Binter, Villach (AT); Tobias Hoechbauer, Villach (AT); Martin Huber, Villach (AT); Iris Moder, Villach (AT); Matteo Piccin, Villach (AT); Francisco Javier Santos Rodriguez, St Jakob im Rosental (AT); and Hans-Joachim Schulze, Taufkirchen (DE)
Assigned to Infineon Technologies AG, Neubiberg (DE)
Filed by Infineon Technologies AG, Neubiberg (DE)
Filed on May 12, 2022, as Appl. No. 17/743,006.
Claims priority of provisional application 63/270,599, filed on Oct. 22, 2021.
Prior Publication US 2023/0127556 A1, Apr. 27, 2023
Int. Cl. H01L 21/02 (2006.01); H01L 21/288 (2006.01); H01L 21/78 (2006.01)
CPC H01L 21/02293 (2013.01) [H01L 21/0203 (2013.01); H01L 21/288 (2013.01); H01L 21/7806 (2013.01)] 29 Claims
OG exemplary drawing
 
1. A method of processing a semiconductor wafer, the method comprising:
forming one or more epitaxial layers over a first main surface of the semiconductor wafer;
forming one or more porous layers in the semiconductor wafer or in the one or more epitaxial layers, wherein the semiconductor wafer, the one or more epitaxial layers and the one or more porous layers collectively form a substrate, wherein forming the one or more porous layers comprises:
forming a low conducting epitaxial layer, a low conducting wafer region, or a low conducting buried wafer region induced by implantation of dopants which provide counter-doping;
forming a higher conducting layer on the low conducting epitaxial layer, the low conducting wafer region, or the low conducting buried wafer region, the higher conducting layer having a higher average doping concentration than the low conducting epitaxial layer, low conducting wafer region, or low conducting buried wafer region; and
forming a homogenous porous layer in the higher conducting layer, wherein the low conducting epitaxial layer, the low conducting wafer region, or the low conducting buried wafer region is arranged deeper in the substrate than the homogenous porous layer;
forming doped regions of a semiconductor device in the one or more epitaxial layers; and
after forming the doped regions of the semiconductor device, separating a non-porous part of the semiconductor wafer from a remainder of the substrate along the one or more porous layers.