US 12,249,397 B2
Computing in memory electronic device capable of supporting current based analog multiply-accumulation operations and time based analog-to-digital conversion
Jongsun Park, Seoul (KR); Hyunchul Park, Seoul (KR); and Kyeongho Lee, Seoul (KR)
Assigned to Korea University Research and Business Foundation, Seoul (KR)
Filed by Korea University Research and Business Foundation, Seoul (KR)
Filed on Nov. 15, 2022, as Appl. No. 17/987,072.
Claims priority of application No. 10-2022-0076991 (KR), filed on Jun. 23, 2022.
Prior Publication US 2023/0420014 A1, Dec. 28, 2023
Int. Cl. G11C 7/00 (2006.01); G11C 7/12 (2006.01); G11C 7/14 (2006.01); G11C 8/08 (2006.01); H03K 19/017 (2006.01)
CPC G11C 7/14 (2013.01) [G11C 7/12 (2013.01); G11C 8/08 (2013.01); H03K 19/01721 (2013.01)] 10 Claims
OG exemplary drawing
 
1. An electronic device comprising:
a memory cell array including a plurality of memory cells configured to perform a product operation of an input signal applied through a plurality of operation word lines and a pre-stored weight and to output a first output signal according to the product operation to a plurality of operation bit lines;
a dummy cell array including a plurality of dummy cells configured to generate a reference signal and to output the reference signal to a plurality of dummy bit lines;
a plurality of VTC(Voltage-to-Time Converter) circuits configured to receive a second output signal obtained by summing the first output signal through the plurality of operation bit lines and the reference signal and to convert the second output signal and the reference signal into a time domain; and
a plurality of TDC(Time-to-Digital Converter) circuits configured to compare the converted second output signal with the converted reference signal and to convert the converted second output signal into a digital domain based on a result of the comparison.