| CPC G11C 7/065 (2013.01) | 20 Claims |
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1. A device, comprising:
an input stage circuit configured to receive a first input signal and generate a second input signal and a third input signal based on the first input signal in a first voltage domain;
a switching circuit configured to couple or decouple the second input signal and the third input signal to a first data line and a second data line respectively, based on a first control signal;
a first latch circuit coupled to the switching circuit by the first data line and the second data line,
wherein the first latch circuit is configured to latch a data based on the second input signal and third input signal in response to the first control signal having a first logic value, and configured to pull up or pull down the first data line and pull down or pull up the second data line respectively in a second voltage domain in response to the first control signal having a second logic value; and
a pair of first transistors and a pair of second transistors that are coupled between the second data line and an output terminal in the second voltage domain and configured to generate an output signal in response to the third input signal, a second control signal and a third control signal,
wherein the first control signal and the third control signal have the same logic value different from that of the second control signal.
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