US 12,249,388 B2
Memory system and nonvolatile memory for improving reliability of stored data and shortening operation time
Katsuhiko Iwai, Yokohama Kanagawa (JP)
Assigned to KIOXIA CORPORATION, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Aug. 15, 2022, as Appl. No. 17/887,985.
Claims priority of application No. 2022-047668 (JP), filed on Mar. 24, 2022.
Prior Publication US 2023/0307084 A1, Sep. 28, 2023
Int. Cl. G11C 16/10 (2006.01); G11C 11/408 (2006.01); G11C 11/4094 (2006.01); G11C 11/4096 (2006.01); G11C 29/52 (2006.01)
CPC G11C 29/52 (2013.01) [G11C 11/4085 (2013.01); G11C 11/4094 (2013.01); G11C 11/4096 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory system comprising:
a nonvolatile memory including a plurality of word lines, a plurality of bit lines, and a plurality of storage elements; and
a control circuit including an ECC circuit, the ECC circuit configured to detect and correct a data error stored in the plurality of storage elements, the control circuit configured to:
acquire first data by reading data stored in the plurality of storage elements of a page, the page connected to the word line with a first read voltage,
acquire second data obtained by correcting the first data when the first data is correctable by the ECC circuit, and
write data based on the second data to the plurality of storage elements of the page;
wherein when the first data is not correctable by the ECC circuit, the control circuit is further configured to:
acquire fourth data by reading data stored in the plurality of storage elements of the page by using a second read voltage different from the first read voltage.