US 12,249,385 B2
Interface circuit, memory controller and method for calibrating signal processing devices in an interface circuit
Fu-Jen Shih, New Taipei (TW)
Assigned to Silicon Motion, Inc., Hsinchu County (TW)
Filed by Silicon Motion, Inc., Hsinchu County (TW)
Filed on Jul. 24, 2023, as Appl. No. 18/225,654.
Claims priority of application No. 112115327 (TW), filed on Apr. 25, 2023.
Prior Publication US 2024/0363183 A1, Oct. 31, 2024
Int. Cl. G11C 29/12 (2006.01)
CPC G11C 29/1201 (2013.01) [G11C 29/12005 (2013.01); G11C 2207/2254 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An interface circuit, comprising:
a signal processing circuit, configured to process a reception signal received from a host device and a transmission signal to be transmitted to the host device,
wherein the signal processing circuit comprises:
a plurality of signal processing devices; and
a monitor and calibration module, comprising:
a process monitor, configured to monitor a current or a voltage of a test element to generate a process detection result;
a temperature monitor, configured to monitor an environment temperature to generate a temperature monitored result;
a processor, configured to receive the process detection result and the temperature monitored result and select a reference value subset as a preferred reference value subset for a calibration operation from a plurality of reference value subsets based on the process detection result and the temperature monitored result; and
a calibration circuit, coupled to the processor and at least one of the plurality of signal processing devices and configured to perform the calibration operation on the at least one of the plurality of signal processing devices according to the preferred reference value subset and in response to a control signal issued by the processer, to adjust a characteristic value of the at least one of the plurality of signal processing devices.