| CPC G11C 16/102 (2013.01) [G11C 16/08 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01)] | 20 Claims |

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1. A memory device, comprising:
an array of memory cells arranged in blocks; and
a peripheral circuit coupled to the array of memory cells and configured to:
determine that a block of the blocks is an open block based on an open block information; and
in response to the block of the blocks being an open block, perform a read operation on a memory cell of the array of memory cells in the block using a compensated read voltage, wherein the compensated read voltage has an offset from a default read voltage of the block.
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