| CPC G11C 16/10 (2013.01) [G06F 17/16 (2013.01); G11C 5/02 (2013.01); G11C 7/1039 (2013.01); G11C 8/14 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01)] | 20 Claims |

|
1. An apparatus, comprising:
an array of memory cells;
a data interface;
a column decode circuitry coupled between the array of memory cells and the data interface; and
a controller coupled to the array of memory cells, the controller configured to cause the apparatus to:
perform a number of prefetch operations, wherein each of the number prefetch operations transfer a particular amount of data from the array of memory cells to a number of sense amplifiers and wherein the particular amount of data corresponds to an amount of data in a matrix having a matrix configuration; and
organize the particular amount of data to correspond to a portion of the matrix configuration by selecting a first portion of the particular amount of data to transfer from a number to sense amplifiers to a processing resource.
|