US 12,249,295 B2
Semiconductor device, display driver, and display device
Hiroyoshi Ichikura, Yokohama (JP)
Assigned to LAPIS Technology Co., Ltd., Yokohama (JP)
Filed by LAPIS Technology Co., Ltd., Yokohama (JP)
Filed on Apr. 11, 2024, as Appl. No. 18/633,464.
Claims priority of application No. 2023-066905 (JP), filed on Apr. 17, 2023.
Prior Publication US 2024/0347019 A1, Oct. 17, 2024
Int. Cl. G09G 3/36 (2006.01)
CPC G09G 3/3696 (2013.01) [G09G 3/3688 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0242 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a gradation voltage generation circuit that converts, according to a load signal, a plurality of pixel data pieces indicating a luminance of each pixel based on a video signal respectively into a plurality of gradation voltages having analog voltage values, and outputs the plurality of gradation voltages;
a plurality of output amplifier circuits that generate a plurality of drive signals by respectively and individually receiving and amplifying the plurality of gradation voltages outputted from the gradation voltage generation circuit, and output the plurality of drive signals to a plurality of data lines formed on a display panel;
a drive control circuit that receives the video signal and outputs the load signal to the gradation voltage generation circuit according to a horizontal synchronization signal included in the video signal; and
a delay time measurement circuit that, in a case of receiving a measurement start signal, obtains, as a measured delay time, a time from a time point of receiving the measurement start signal to a time point at which a voltage value of the drive signal outputted from one output amplifier circuit among the plurality of output amplifier circuits exceeds a predetermined threshold voltage, wherein
the drive control circuit supplies the load signal to the gradation voltage generation circuit according to the measurement start signal, and thereafter shifts a timing of outputting the load signal by a time difference between the measured delay time and a reference delay time.