US 12,249,022 B2
Displaced micro-meshes for ray and path tracing
John Burgess, Austin, TX (US); Gregory Muthler, Chapel Hill, NC (US); Nikhil Dixit, Austin, TX (US); Henry Moreton, Woodside, CA (US); Yury Uralsky, Los Gatos, CA (US); Magnus Andersson, Lund (SE); Marco Salvi, Seattle, WA (US); and Christoph Kubisch, Aachen (DE)
Assigned to NVIDIA Corporation, Santa Clara, CA (US)
Filed by NVIDIA Corporation, Santa Clara, CA (US)
Filed on Sep. 16, 2022, as Appl. No. 17/946,515.
Claims priority of provisional application 63/245,155, filed on Sep. 16, 2021.
Prior Publication US 2023/0081791 A1, Mar. 16, 2023
Int. Cl. G06T 15/06 (2011.01); G06T 1/60 (2006.01); G06T 9/00 (2006.01); G06T 15/40 (2011.01); G06T 17/10 (2006.01); G06T 17/20 (2006.01); G06T 19/20 (2011.01)
CPC G06T 15/06 (2013.01) [G06T 1/60 (2013.01); G06T 9/001 (2013.01); G06T 15/40 (2013.01); G06T 17/10 (2013.01); G06T 17/20 (2013.01); G06T 17/205 (2013.01); G06T 19/20 (2013.01); G06T 2210/08 (2013.01); G06T 2210/21 (2013.01); G06T 2210/36 (2013.01); G06T 2219/2016 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A graphics system comprising:
a processor,
a memory, and
ray tracing circuitry connected to the processor and the memory, the ray tracing circuitry being configured to perform operations comprising:
receive data representing a polygon,
subdividing the polygon into smaller polygons thereby forming a polygon mesh;
cull at least some of the smaller polygons of the polygon mesh, and
test vertices of non-culled smaller polygons of the polygon mesh to determine intersection with an input ray,
wherein the ray tracing circuitry is further configured to recursively subdivide the polygon and process resulting subdivisions in an order dictated by a space filling curve.