US 12,249,003 B2
Device and method with data preprocessing
Myeongjae Jeon, Ulsan (KR); Chanho Park, Ulsan (KR); and Kyuho Lee, Ulsan (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR); and UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY), Ulsan (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR); and UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY), Ulsan (KR)
Filed on Dec. 22, 2021, as Appl. No. 17/558,686.
Claims priority of application No. 10-2021-0074809 (KR), filed on Jun. 9, 2021.
Prior Publication US 2022/0398685 A1, Dec. 15, 2022
Int. Cl. G06T 1/20 (2006.01); G06N 20/00 (2019.01)
CPC G06T 1/20 (2013.01) [G06N 20/00 (2019.01)] 23 Claims
OG exemplary drawing
 
1. A storage device with data preprocessing, comprising:
a first memory configured to store raw data; and
a field programmable gate array (FPGA) in which reconfigurable augmentation modules are programmed, where the FPGA includes a decoder configured to decode the raw data, a second memory configured to store the decoded raw data, and a processor,
wherein the processor is configured to:
determine target augmentation modules, from among the reconfigurable augmentation modules, based on a data preprocessing pipeline;
receive information associated with an idle state of each of the determined target augmentation modules:
select an idle augmentation module, from among the determined target augmentation modules;
perform the data preprocessing pipeline using the determined target augmentation modules to generate augmented data, including an augmentation of at least a portion of the decoded raw data stored in the second memory using the idle augmentation module in parallel with the determined target augmentation modules; and
implement provision of the augmented data to a graphics processing unit (GPU) or Neural Processing Unit (NPU).