CPC G06F 3/0664 (2013.01) [G06F 3/061 (2013.01); G06F 3/0679 (2013.01); G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01)] | 48 Claims |
1. An apparatus comprising:
at least one PCIe interface configured to be electrically connected to at least one graphics processing unit (GPU) that supports single-root input/output virtualization (SR-IOV), wherein each graphics processing unit comprises a graphics controller, at least one graphics processor core, and at least one graphics memory, wherein the SR-IOV graphics processing unit enables the at least one graphics processor core and at least one partition of the graphics memory to be attached to and accessed by one or more physical functions and a plurality of virtual functions;
at least a first input/output port and a second input/output port;
a management PCIe switch device configured to communicate with at least a first host device and a second host device, wherein the first host device comprises a first central processor unit (CPU), a first operating system (OS), and a first local PCIe interface device, wherein the second host device comprises a second central processor unit, a second operating system, and a second local PCIe interface device;
wherein the management PCIe switch device is configured to assign one or more virtual functions to each of the first and second host devices, and enable each of the first and second host devices to access at least one graphics processor core and at least one partition of the graphics memory using the respective assigned virtual function, wherein the management PCIe switch device is configured to communicate with the at least one graphics processing unit through the at least one PCIe interface, wherein the management PCIe switch device is configured to communicate with the first host device through the first input/output port and the first local PCIe interface device, wherein the management PCIe switch device is configured to communicate with the second host device through the second input/output port and the second local PCIe interface device;
a management central processor unit; and
a memory device configured to store management software that when executed by the management CPU causes the management CPU to configure the management PCIe switch device and the graphics controller to enable the host devices to access the at least one graphics processor core and the at least one partition of the graphics memory using the respective assigned virtual functions.
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