US 12,248,702 B2
Memory controller including memory manager for mapping buffer identifier to segment
Tae Ho Lim, Icheon-si (KR); Ie Ryung Park, Icheon-si (KR); Dong Sop Lee, Icheon-si (KR); Youn Won Park, Icheon-si (KR); and Jae Min Jang, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Jan. 7, 2023, as Appl. No. 18/151,429.
Claims priority of application No. 10-2022-0108334 (KR), filed on Aug. 29, 2022.
Prior Publication US 2024/0069796 A1, Feb. 29, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0656 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0673 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory controller comprising:
a plurality of processors;
a memory device including a plurality of segments, which are divided into a plurality of segment groups, to which group identifiers are respectively assigned; and
a memory manager configured to:
map a first buffer identifier to a first group identifier from among the group identifiers,
select one or more segments only from a first segment group, to which the first group identifier is assigned among the plurality of segment groups, within a maximum allocation count corresponding to the first group identifier,
map the first buffer identifier to the one or more segments, and
allocate, to a first processor from among the plurality of processors, the first buffer identifier and the one or more segments.