| CPC G06F 3/0619 (2013.01) [G06F 3/0653 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 16/102 (2013.01); G11C 16/20 (2013.01); G11C 16/26 (2013.01); G11C 16/3404 (2013.01); G11C 16/3459 (2013.01)] | 18 Claims |

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1. An operating method of a non-volatile memory device, the method comprising:
receiving a program command from an external device;
determining an operating mode in response to the program command;
when the operating mode is a surface mount technology (SMT) mode, performing an initial program operation in which a plurality of memory cells are programmed through a plurality of steps to form a first threshold voltage distribution; and
when the operating mode is a normal mode, performing a normal program operation in which the plurality of memory cells are programmed through a single step to form a second threshold voltage distribution,
wherein the first threshold voltage distribution is narrower in width than the second threshold voltage distribution,
wherein the performing of the initial program operation includes:
performing a 1-step initial program operation in which memory cells selected from the plurality of memory cells are programmed based on first initial program voltages and first initial verify voltages; and
performing a 2-step initial program operation in which the selected memory cells are programmed based on second initial program voltages and second initial verify voltages to form the first threshold voltage distribution,
wherein the performing of the initial program operation further includes:
determining whether a word line of an erase state is present in a selected memory block;
when the word line of the erase state is present in the selected memory block, programming dummy data in memory cells associated with the word line of the erase state; and
when the word line of the erase state is absent from the selected memory block, completing the initial program operation.
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