US 12,248,681 B2
Sequential write operations using multiple memory dies
Rakeshkumar Dayabhai Vaghasiya, Hyderabad (IN); and Anilkumar Rameshbhai Sindhi, Hyderabad (IN)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Aug. 9, 2022, as Appl. No. 17/884,422.
Prior Publication US 2024/0053900 A1, Feb. 15, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0616 (2013.01) [G06F 3/0629 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory system, comprising:
a plurality of memory dies; and
processing circuitry coupled with the plurality of memory dies and configured to cause the memory system to:
receive one or more commands associated with a sequential write operation and indicating to write a sequence of data at the memory system in accordance with an ordering of the sequential write operation, the one or more commands comprising a command to open a zone of a file system for writing the sequence of data;
write, based at least in part on the one or more commands, a respective subset of the sequence of data to each first memory die of a plurality of first memory dies of the plurality of memory dies;
read the respective subsets of the sequence of data from the plurality of first memory dies; and
write, based at least in part on organizing the respective subsets of the sequence of data in accordance with the ordering of the sequential write operation, the sequence of data to a second memory die of the plurality of memory dies in accordance with the ordering of the sequential write operation and in accordance with the zone of the file system being open, the zone associated with the second memory die.