| CPC G06F 11/1441 (2013.01) [G06F 11/076 (2013.01); G06F 11/0793 (2013.01); G06F 11/3058 (2013.01)] | 20 Claims |

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1. A data storage device comprising:
a plurality of memory dies; and
a processor configured to communicate with the plurality of memory dies and further configured to:
in response to determining that a subset of the plurality of memory dies is non-responsive, inform a host that the data storage device will perform a hardware reset on the subset of the plurality of memory dies;
in response to receiving an acknowledgment from the host, perform the hardware reset on the subset of the plurality of memory dies by:
sending a command to all memory dies of the plurality of memory dies to ignore a hardware reset command, wherein because the subset of the plurality of memory dies is non-responsive, the subset of the plurality of memory dies does not receive the command to ignore the hardware reset command; and
sending the hardware reset command on a communication channel shared by the plurality of memory dies; and
inform the host after the hardware reset on the subset of the plurality of memory dies has been performed.
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