| CPC G06F 11/1417 (2013.01) [G06F 21/575 (2013.01); G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01)] | 18 Claims |

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1. An electronic device comprising a plurality of chiplets, comprising:
a main chiplet including a first memory in which first boot firmware is stored and a first security module in which an immutable first source is stored; and
at least one sub-chiplet including a second memory in which second boot firmware is stored, wherein
the main chiplet is configured to:
check an integrity of the first boot firmware using the first source before initializing a first interface for inter-chiplet connection;
load the first boot firmware if the first boot firmware passes the integrity check;
in response to receiving signal related to booting, initialize the first interface based on the first boot firmware;
acquire third boot firmware stored in an external memory;
initialize a second interface for communication between an external device and the main chiplet based on the third boot firmware;
set a configuration for interconnection between the main chiplet and the at least one sub-chiplet;
initialize a third memory included in the main chiplet; and
load at least one of an application firmware or an operating system to the third memory, and
the at least one sub-chiplet is configured to,
in response to receiving the signal related to booting, initialize the first interface based on the second boot firmware.
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