US 12,248,368 B2
Memory device and module life expansion
Fabrice Aidan, Ramat HaSharon (IL); and Evgeni Krimer, Haifa (IL)
Assigned to Google LLC, Mountain View, CA (US)
Filed by Google LLC, Mountain View, CA (US)
Filed on Mar. 28, 2023, as Appl. No. 18/127,425.
Prior Publication US 2024/0330108 A1, Oct. 3, 2024
Int. Cl. G06F 11/00 (2006.01); G06F 11/10 (2006.01)
CPC G06F 11/1024 (2013.01) [G06F 11/1044 (2013.01); G06F 11/1064 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A process for managing detection of errored data in a memory device, comprising:
obtaining data and a first error correction code associated with the data obtained and associated with a read access request to the memory device,
determining that the data obtained contains an error based on the first error correction code,
determining a temporal characteristic associated with the error, including whether the error is transient, intermittent, or permanent,
determining a spatial characteristic associated with the error by probing one or more memory addresses spatially related to one or more errored memory addresses associated with the error, and
responsive to determining that the error is intermittent or permanent and the determined spatial characteristic, adapting operations associated with the one or more errored memory addresses or an output pin associated with the error.