| CPC G06F 1/3296 (2013.01) [G06F 1/28 (2013.01); G06N 20/00 (2019.01)] | 23 Claims |

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1. A computing system comprising:
a deterministic processor that operates at a selected clock frequency, wherein the deterministic processor is configured to execute defined instructions at defined times during each execution of an algorithm;
a voltage regulator configured to regulate a supply voltage for the deterministic processor;
a controller configured to generate a plurality of control signals for the voltage regulator to regulate the supply voltage for the deterministic processor; and
a power management module configured to:
determine an initial profile for power consumption and performance of the algorithm executed on the deterministic processor having an initial value for the supply voltage and an initial value for the clock frequency, and
determine a target profile for power consumption and performance of each execution of the algorithm on the deterministic processor based on the defined instructions scheduled to be executed,
the controller further configured to dynamically modify the plurality of control signals based on the initial profile and the target profile, and
the deterministic processor is configured to execute the algorithm while the supply voltage is dynamically modified by the voltage regulator based on the modified plurality of control signals.
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