US 12,248,347 B2
Series circuit and computing device
Nangeng Zhang, Hangzhou (CN); and Min Chen, Hangzhou (CN)
Assigned to HANGZHOU CANAAN INTELLIGENCE INFORMATION TECHNOLOGY CO, LTD, Hangzhou (CN)
Filed by Hangzhou Canaan Intelligence Information Technology Co, Ltd, Hangzhou (CN)
Filed on May 22, 2023, as Appl. No. 18/321,332.
Application 18/321,332 is a continuation of application No. 17/563,898, filed on Dec. 28, 2021, granted, now 11,698,670.
Application 17/563,898 is a continuation of application No. 15/993,124, filed on May 30, 2018, granted, now 11,243,588, issued on Feb. 8, 2022.
Prior Publication US 2023/0288972 A1, Sep. 14, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 1/26 (2006.01); H03K 19/0185 (2006.01)
CPC G06F 1/26 (2013.01) [H03K 19/0185 (2013.01)] 34 Claims
OG exemplary drawing
 
1. A series circuit, comprising:
a power supply terminal;
a ground terminal;
a plurality of chips connected between the power supply terminal and the ground terminal in series, and at least one of the chips has a signal input terminal and a signal output terminal;
a first connection line electrically connected between a first chip and a second chip of adjacent chips, and the first connection line having a first voltage; and
a second connection line connected between the first connection line and the signal input terminal or the signal output terminal of a third chip,
wherein the first voltage is greater than or equal to a preset voltage and the preset voltage is the minimum voltage required by the plurality of chips for communication; and the series circuit further comprises communication lines connected between the signal input terminal of a previous chip and the signal output terminal of a next chip.