US 12,248,003 B2
Clustered rigid wafer test probe
David Michael Audette, Colchester, VT (US); Grant Wagner, Jericho, VT (US); Peter William Neff, Cambridge, VT (US); Jacob Louis Moore, Milton, VT (US); and Melissa Keefe, Cortlandt Manor, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Dec. 6, 2022, as Appl. No. 18/062,096.
Prior Publication US 2024/0183880 A1, Jun. 6, 2024
Int. Cl. G01R 1/067 (2006.01); G01R 1/073 (2006.01)
CPC G01R 1/067 (2013.01) [G01R 1/07342 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system to test an integrated circuit (IC) device, the system comprising:
an IC device comprising a grid of contacts arranged in rows and columns; and
a first IC device test probe comprising a first cluster of a first plurality of rigid and integrated tapered probe tips that taper upon a plane that is orthogonal to a seating direction of the first IC device test probe toward the IC device.