US 11,925,075 B2
Display apparatus
Yangwan Kim, Yongin-si (KR); Wonkyu Kwak, Yongin-si (KR); Jaedu Noh, Yongin-si (KR); and Jaeyong Lee, Yongin-si (KR)
Assigned to Samsung Display Co., Ltd., Yongin-si (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed on Jul. 8, 2021, as Appl. No. 17/370,815.
Application 17/370,815 is a continuation of application No. 17/010,777, filed on Sep. 2, 2020, granted, now 11,063,107.
Application 17/010,777 is a continuation of application No. 16/552,819, filed on Aug. 27, 2019, granted, now 10,784,329, issued on Sep. 22, 2020.
Application 16/552,819 is a continuation of application No. 15/838,138, filed on Dec. 11, 2017, granted, now 10,439,015, issued on Oct. 8, 2019.
Application 15/838,138 is a continuation of application No. 14/660,813, filed on Mar. 17, 2015, granted, now 9,842,892, issued on Dec. 12, 2017.
Claims priority of application No. 10-2014-0100700 (KR), filed on Aug. 5, 2014.
Prior Publication US 2021/0335970 A1, Oct. 28, 2021
Int. Cl. H10K 59/126 (2023.01); H01L 27/12 (2006.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01); G02F 1/1362 (2006.01)
CPC H10K 59/126 (2023.02) [H01L 27/124 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/131 (2023.02); G02F 1/136213 (2013.01); G02F 1/136218 (2021.01); G02F 1/13629 (2021.01)] 15 Claims
OG exemplary drawing
 
1. A display apparatus comprising:
a first thin-film transistor comprising a first gate electrode and a first semiconductor layer;
a first electrode layer overlapping the first gate electrode;
a first voltage line extended in a first direction and electrically connected to the first electrode layer;
a data line extended in the first direction; and
a second thin-film transistor comprising a second gate electrode and a second semiconductor layer, the second semiconductor layer being extended from one end of the first semiconductor layer and being electrically connected to the data line; and
wherein the first semiconductor layer is extended in a second direction perpendicular to the first direction and the second semiconductor layer is extended in the first direction,
wherein the first electrode layer overlaps the first semiconductor layer and the second semiconductor layer, in a plan view, and
wherein a length along the first direction of the overlapping part of the first electrode layer with the second semiconductor layer is longer than a length along the first direction of the first gate electrode.