US 11,925,015 B2
Vertical memory devices and methods of manufacturing the same
Sang-Yong Park, Suwon-si (KR); Kee-Jeong Rho, Hwaseong-si (KR); Hyeong Park, Hwaseong-si (KR); and Tae-Wan Lim, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Sep. 18, 2020, as Appl. No. 17/024,987.
Application 17/024,987 is a continuation of application No. 15/712,836, filed on Sep. 22, 2017, granted, now 10,811,421.
Application 15/712,836 is a continuation of application No. 14/965,532, filed on Dec. 10, 2015, granted, now 9,780,096, issued on Oct. 3, 2017.
Claims priority of application No. 10-2015-0006980 (KR), filed on Jan. 14, 2015.
Prior Publication US 2021/0005615 A1, Jan. 7, 2021
Int. Cl. H10B 12/00 (2023.01); H01L 23/31 (2006.01); H01L 23/528 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 29/792 (2006.01); H10B 43/27 (2023.01); H10B 43/30 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01); H10B 43/50 (2023.01)
CPC H10B 12/50 (2023.02) [H01L 23/3171 (2013.01); H01L 23/3185 (2013.01); H01L 23/528 (2013.01); H01L 29/42352 (2013.01); H01L 29/4236 (2013.01); H01L 29/7827 (2013.01); H01L 29/7926 (2013.01); H10B 43/27 (2023.02); H10B 43/30 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02); H10B 43/50 (2023.02); H01L 2924/0002 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A vertical memory device comprising:
a cell gate stack structure on a substrate, the cell gate stack structure comprising a plurality of cell gate lines spaced apart from one another in a vertical direction, and an opening adjacent to the plurality of cell gate lines, the opening passing through the cell gate stack structure;
a contact plug in the opening, the contact plug comprising an inner sidewall delimiting a recessed region in the opening;
a buried film pattern in a portion of the recessed region, the buried film pattern being formed of a Si-containing material;
a contact overlying the buried film pattern, the contact comprising an inner contact portion disposed in the recessed region; and
a separation film pattern interposed between the plurality of cell gate lines and the contact plug,
wherein the contact plug comprises a conductive metal nitride, and
wherein the inner contact portion of the contact is in contact with the buried film pattern within the recessed region.