CPC H05B 45/48 (2020.01) [H05B 47/16 (2020.01); H05B 47/165 (2020.01); H05B 47/20 (2020.01); B60Q 1/381 (2022.05); F21Y 2115/10 (2016.08)] | 22 Claims |
1. A light emission control system comprising:
a first light emission control device including:
a first controller configured to be able to perform control whereby to light or extinguish individually a plurality of light-emitting elements included in a first light-emitting element array;
a clock generator configured to generate a clock signal with a variable characteristic; and
a first clock terminal connected to a clock lead across which to transmit the clock signal; and
a second light emission control device including:
a second controller configured to be able to perform control whereby to light or extinguish individually a plurality of light-emitting elements included in a second light-emitting element array; and
a second clock terminal connected to the clock lead,
wherein
the first controller is configured, when triggered by fulfillment of a predetermined condition, to perform a first driving sequence in which the first controller sequentially switches between lit and extinguished states of the light-emitting elements in the first light-emitting element array synchronously with the clock signal,
the clock generator is configured, at a particular time point after a start of the first driving sequence, to change the characteristic of the clock signal from a predetermined first characteristic to a predetermined second characteristic, and
the second controller is configured,
after the characteristic of the clock signal received at the second clock terminal is changed from the first characteristic to the second characteristic, to perform a second driving sequence in which the second controller sequentially switches between lit and extinguished states of the light-emitting elements in the second light-emitting element array synchronously with the clock signal and
to determine a time point at which to start the second driving sequence with reference to a time point at which the characteristic of the clock signal received at the second clock terminal is changed.
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