US 11,923,652 B2
Header for semiconductor package, and semiconductor package
Yasuyuki Kimura, Nagano (JP); and Takumi Ikeda, Nagano (JP)
Assigned to SHINKO ELECTRIC INDUSTRIES CO., LTD., Nagano (JP)
Filed by SHINKO ELECTRIC INDUSTRIES CO., LTD., Nagano (JP)
Filed on Mar. 10, 2021, as Appl. No. 17/197,434.
Claims priority of application No. 2020-052652 (JP), filed on Mar. 24, 2020.
Prior Publication US 2021/0305472 A1, Sep. 30, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. H01S 5/02315 (2021.01); H01S 5/024 (2006.01)
CPC H01S 5/02315 (2021.01) [H01S 5/02415 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A header for a semiconductor package, comprising:
an eyelet having an upper surface, and a lower surface on an opposite side from the upper surface;
a first metal block having a first side surface, and configured to protrude from the upper surface of the eyelet;
a first lead sealed in a first through hole which penetrates the eyelet from the upper surface to the lower surface of the eyelet; and
a first substrate having a front surface formed with a first signal pattern electrically connected to the first lead, and a back surface on an opposite side from the front surface thereof, wherein
the back surface of the first substrate is fixed to the first side surface of the first metal block,
a first portion of the back surface of the first substrate is exposed from the first metal block at a position above an upper surface of the first metal block, and
the first portion of the first substrate is formed with a ground pattern.