US 11,923,325 B2
Storage system, memory chip unit, and wafer
Yasuhito Yoshimizu, Yokkaichi Mie (JP); Takashi Fukushima, Yokkaichi Mie (JP); Tatsuro Hitomi, Yokohama Kanagawa (JP); Arata Inoue, Chigasaki Kanagawa (JP); Masayuki Miura, Yokkaichi Mie (JP); Shinichi Kanno, Tokyo (JP); Toshio Fujisawa, Yokohama Kanagawa (JP); Keisuke Nakatsuka, Kobe Hyogo (JP); and Tomoya Sanuki, Yokkaichi Mie (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Mar. 15, 2022, as Appl. No. 17/695,654.
Application 17/695,654 is a continuation of application No. PCT/JP2020/039590, filed on Oct. 21, 2020.
Claims priority of application No. PCT/JP2019/044870 (WO), filed on Nov. 15, 2019.
Prior Publication US 2022/0223552 A1, Jul. 14, 2022
Int. Cl. H01L 23/00 (2006.01); G06F 11/07 (2006.01); H01L 23/544 (2006.01)
CPC H01L 24/05 (2013.01) [G06F 11/073 (2013.01); G06F 11/0751 (2013.01); H01L 23/544 (2013.01); H01L 2223/5446 (2013.01); H01L 2224/05139 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05157 (2013.01); H01L 2224/05164 (2013.01); H01L 2924/14511 (2013.01)] 29 Claims
OG exemplary drawing
 
1. A storage system comprising:
a first memory chip unit including a first pad electrode including a first portion and a second portion electrically coupled to each other, and a first memory cell array electrically coupled to the first pad electrode; and
a prober that is able to hold the first memory chip unit and executes reading and writing on the first memory cell array of the held first memory chip unit, wherein
the prober includes
a probe card including a first probe electrode that is able to be in contact with the first pad electrode of the held first memory chip unit, and a first memory controller that is able to be electrically coupled to the first probe electrode and execute reading and writing on the first memory cell array via the first probe electrode, and
a movement mechanism that moves the probe card or the held first memory chip unit to bring the first pad electrode of the held first memory chip unit into contact with the first probe electrode, and
the movement mechanism executes a first operation that brings the first probe electrode into contact with the first portion of the first pad electrode and does not bring the first probe electrode into contact with the second portion of the first pad electrode, and a second operation that does not bring the first probe electrode into contact with the first portion of the first pad electrode and brings the first probe electrode into contact with the second portion of the first pad electrode.