US 11,923,260 B2
Semiconductor device and method of forming electrical circuit pattern within encapsulant of SIP module
JinHee Jung, Incheon (KR); and ChangOh Kim, Incheon (KR)
Assigned to STATS ChipPAC Pte. Ltd., Singapore (SG)
Filed by STATS ChipPAC Pte. Ltd., Singapore (SG)
Filed on Jan. 16, 2023, as Appl. No. 18/154,993.
Application 18/154,993 is a division of application No. 17/307,795, filed on May 4, 2021, granted, now 11,581,233.
Prior Publication US 2023/0154812 A1, May 18, 2023
Int. Cl. H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/60 (2006.01); H01L 23/66 (2006.01)
CPC H01L 23/31 (2013.01) [H01L 21/565 (2013.01); H01L 23/60 (2013.01); H01L 23/66 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
an electrical component assembly;
a conductive post formed over the electrical component assembly;
a molding compound sheet disposed over the electrical component assembly and conductive post as a first encapsulant;
a first electrical circuit pattern disposed in a surface of the first encapsulant;
a second encapsulant deposited over the first encapsulant; and
a conductive layer formed over the second encapsulant and within an opening in the second encapsulant and further formed within an opening in the first encapsulant extending to the conductive post.